COURSE HIGHLIGHTS:
• Trainers with 20+ years of Industry and 15+ years of teaching experience.
• Make-Flow Based Learning ( Industry uses Make-flow )
• Excellent coverage of concepts along with practical labs.
• 24/7 Lab access with VPN/VNC.
• SYNOPSYS tools ( DC, ICC2, Fusion Compiler, PrimeTime).
• Placement assistance till you get placed.
• Option to attend the classes again in the next batch without any payment.
• Trainer has trained 1000+ Engineers worldwide.
• Resume preparation, interview guidance and placement support.
• Grooming the candidates for the written test & interview.
• Freedom to update the course syllabus.
• Access the tools from anywhere & anytime.

Tools : (Synopsys Tools – Latest Versions)
• Design Compiler
• IC-Compiler 2
• Fusion-Compiler
• Star-RC
• PrimeTime
• Formality

Syllabus : (PD – Mentorship)

• Basics:
  ○ Module 1: Digital Circuit Design
  ○ Module 2: CMOS Circuit & Layout Design
  ○ Module 3: Linux Operating System
  ○ Module 4: ASIC/SOC Design flow
  ○ Module 5: PDK and Technology Library
  ○ Module 6: Standard Cell & Macro Libraries
  ○ Module 7: Timing Constraint ( SDC ) Development
  ○ Module 8: Static Timing Analysis

• Implementation:
  ○ Module 9: RTL Synthesis
  ○ Module 10: Pre-Layout STA
  ○ Module 11: Introduction to DFT
  ○ Module 12: Introduction to Physical Design Flow
  ○ Module 13: Design Planning (Floorplan)
  ○ Module 14: Power-Routing
  ○ Module 15: Physical Cells Placement & Std-Cell Pre-Placement
  ○ Module 16: Std-Cell Placement
  ○ Module 17: Scan-Chain Re-Ordering
  ○ Module 18: Pre-CTS Timing Analysis & Optimization
  ○ Module 19: CTS
  ○ Module 20: Post-CTS Timing Analysis & Optimization
  ○ Module 21: Routing

• SignoffChecks:
  ○ Module 22: Physical Verification
  ○ Module 23: RC Extraction
  ○ Module 24: Sign-off STA Checks
  ○ Module 25: Timing Closure
  ○ Module 26: ECO Implementation
  ○ Module 27: Logical Equivalence Check
  ○ Module 28: IR-Drop and Electromigration Analysis Flow

• Advanced Topics:
  ○ Module 29: Low Power Methodologies & UPF
  ○ Module 30: TCL Scripting
  ○ Module 31: Advanced STA Topics
  ○ Module 32: Introduction to Fin-FET & Double-Patterning.
  ○ Module 33: Introduction to 16nm, 7nm Technologies & Floorplan Challenges
  ○ Module 34: Make-Flow & LSF
  ○ Module 35: Final Projects ( Multiple Designs with different technologies )

• Placement & Career Guidance:
  ○ Soft-Skills Training
  ○ Student Presentation
  ○ Resume Preparation
  ○ Interview Guidance
  ○ Mock Interviews